Electrical Engineering and Computer Science

CSE doctoral student Subhankar Pal receives Rackham Predoctoral Fellowship

The fellowship will advance his research on exploiting hardware reconfigurability in an effort to bridge the gap between programmability and efficiency that affects modern computing systems.

Subhankar Pal Enlarge
Subhankar Pal

CSE PhD candidate Subhankar Pal has received a Rackham Predoctoral Fellowship to support his research on software-defined, reconfigurable architectures that aims to realize an introspective computer, which is a computer that can examine its computational behavior and tune its hardware to match the application characteristics. This type of system is targeted towards graph analytics, artificial intelligence, scientific computing and other broad application domains.

The benefits associated with Moore’s law, which observes the trend of doubling transistor count every two years, are dwindling as transistor sizes approach the width of a few atoms. This has led to a surge in the adoption of specialized hardware in the form of Application-Specific Integrated Circuit (ASIC) based accelerators. 

ASICs deliver significantly better performance and efficiency than general-purpose processors, such as CPUs, but at the cost of loss of programmability. In addition, the high costs and resource requirements associated with designing, manufacturing, and testing new ASIC designs deters their use, particularly for scenarios involving a broad set of applications, or in domains with fast-paced algorithmic innovation, such as machine learning. 

Subhankar’s dissertation work aims to bridge this programmability-efficiency gap and deliver near-ASIC efficiencies across such diverse applications while retaining CPU-like programmability in order to cater to changing algorithms. 

His work proposes a flexible hardware architecture that adapts to the specific requirements of each phase of an application, as well as the data. The hardware is complemented with runtime software that monitors hardware performance counters and uses machine learning to predict the best configuration for the specific application phase. The system provides CPU-like programmability through a set of programming intrinsics that allow for code tuning and optimization. 

The proposed system demonstrates significant performance and energy efficiency gains over existing general-purpose computing platforms, particularly for applications involving sparse data, such as in graph analytics and linear solvers. Overall, this work aims for impact to the broader computing community, as it takes a concrete step towards realizing practical, introspective computers.

Subhankar’s work has been recognized in the form of peer-reviewed scholarly articles in conferences in the domains of computer architecture (HPCA, PACT), signal processing and systems (ISCAS and ICASSP), system modeling and characterization (IISWC, ISPASS), and circuit design (VLSI). 

Subhankar has also worked extensively with prominent research groups at IBM and AMD Research on topics such as software enhancements for deep neural network (DNN) accelerators, energy optimizations for real-time, heterogeneity-aware schedulers, and CPU front-end optimizations for exascale computing.

Subhankar is advised by Prof. Ron Dreslinski and works closely with Bredt Family Professor of Engineering Trevor Mudge in CSE, and Prof. Hun-Seok Kim and Kensall D. Wise Collegiate Professor of Electrical Engineering and Computer Science David Blaauw in ECE. He is also actively collaborating with Prof. Chaitali Chakrabarti from Arizona State University, Prof. Michael O’Boyle from the University of Edinburgh, and Prof. Christophe Dubach at McGill University. Subhankar’s research is part of a broader research project under the DARPA Software-Defined Hardware program and is a collaborative effort made possible by multiple contributors from the University of Michigan, University of Edinburgh, Arizona State University, and ARM.

About the Rackham Predoctoral Fellowship

The Rackham Predoctoral Fellowship supports outstanding doctoral students who have achieved candidacy and are actively working on dissertation research and writing. They seek to support students working on dissertation that are unusually creative, ambitious and risk-taking.

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Chip Design, Architecture, and Emerging Devices; Graduate students; Honors and Awards; Ronald Dreslinski; Student News; Trevor Mudge